7 Reasons Affecting Signal Integrity, Which one did you “shot”?
“7 Reasons Affecting Signal Integrity, Which one did you “shot”?
1. The influence of the voltage drop of the line resistance – the increase of the low level caused by the ground level (0 level) DC
The dotted line in the figure is the case of increase. The increase is related to the power consumption of the IC, the density of the IC, the feeding method, the ground wire resistance (R), and the total current of the ground wire fed. ΔV ground = ΔI × ΔR
2. The influence of the voltage drop of the signal line resistance
a) The IC output pins are routed through printed wires or cables to the input pins of another IC,
The output low-level current causes a low-level rise on the printed conductor or cable resistance, and its value is ΔVOL=IOL×R. See the upper dashed line in the figure.
Obviously, the rise of the low level is related to the resistance value of the printed wire and the output low-level current, as shown in the following figure:
The low level at point B is higher than the low level at point A
Note: When the IC output pin is low level, if the device is not a driver, but a general device, because the output low level current is too large, much larger than the value given in the device manual, the output transistor will exit the saturation region and enter the work. area, so that the output low level is raised a lot. As shown by the dotted line above in the figure below:
Decisive factor: Termination method
Termination resistor size
Output tube saturation depth
Output tube beta value
b) The IC output pin passes through the printed wire or cable to the input pin of another IC, and the output high-level current causes a high-level reduction on the printed wire or cable resistance, and its value is ΔVOH=IOH×R, See the dashed line below on the high level in the image below:
IOH is determined by the following factors: termination method, termination level, termination resistance size
R is determined by the following factors: line width, line thickness, line length
Obviously, the reduction of the high level is related to the resistance value of the printed wire or cable and the output high level current, as shown in the following figure:
The high level at point B is lower than the high level at point A
Note: When the IC output pin is at a high level, if the device is not a driver, but a general device, the output tube will also exit the saturation region and enter the working area, so that the output high level is reduced a lot. It is shown by a dashed line in the figure below:
3. The influence of the voltage drop of the power line resistance
The power supply voltage of the IC (such as +3.3V), if there is a difference in the system, when it is less than +3.3V, the output high level will produce a drop value, as shown by the dotted line on the high level in the above figure:
Since the system power supply is divided into centralized power supply and scattered power supply modules, the difference is different. Due to the size of IC power consumption, IC density, feeding method, feeding resistance value of the power line and power supply current value, a ΔVCC (ΔVCC =ΔI×ΔR)
For the above reasons, the TTL signal waveform becomes very far from the ideal waveform. The low level is greatly increased, and the high level is also greatly reduced. If these values are not strictly controlled, it is unfavorable for the stable and reliable work of the system. In addition, the junction temperature difference, that is, the temperature of the PN junction of devices with different power consumption, will also affect the changes of the high and low levels and the threshold level, and will also affect the system operation.
In addition to the DC component mentioned above, what is more important is that the system operates at a very high frequency, that is, the devices and wires in the system have various frequencies, and the signals of various conversion rates are operating and transmitting. . The first is the electromagnetic coupling (crosstalk) of the signals with each other and the reflection of the signals on the transmission paths of different characteristic impedances, as well as the power supply and the ground level. The current spike level caused by the high-frequency conversion of the IC makes the TTL signal waveform worse. .
4. Conversion noise
When the system is working, the device is converted at high frequency, resulting in high-frequency current spikes on the power supply system, and the power supply line and ground line of the power supply can be regarded as small resistance, inductance, and capacitance elements. The current spikes are too large, and a large AC spike voltage will be generated on them. The spike voltage on the power supply will basically crosstalk to a high level, and the spike voltage on the ground level will crosstalk to a low level. As shown in the figure below: This spike voltage also exists inside the IC.
5. Crosstalk noise
As the system is assembled more and more densely, the distance between the printed conductors is getting closer and closer, and there are high-speed switching level signals on the adjacent conductors. For example, the transition time tr of the positive transition signal and the time tf of the negative transition are very small, so that a large electromagnetic coupling signal (crosstalk signal) is superimposed on the existing signal on the wire. Larger spikes in the image below. These signals also include crosstalk signals between signal pins on the header and crosstalk between signals in the cable.
Determining factors: tr and tf values, line width, line spacing, thickness of the (substrate) medium, dielectric constant of the medium, length of parallel lines, length of overlapping lines, pin ratio of signal pins of plug sockets, ratio of cable signal lines to ground .
6. Reflection noise
If the interconnecting lines between ICs are long (complex systems are often the case), the characteristic impedance of the lines is not uniform, or the terminals are not matched, which will cause reflections. If the starting ends are not matched, it will reflect back and forth and cause ringing. As shown below:
Determining factors: characteristic impedance, matching method, mismatch size
End reflection coefficient, start end reflection coefficient, line length
7. Edge Distortion
If the signal frequency increases to a certain level, that is, the operating frequency of the device reaches a certain height limit, and the printed wire is long or the load capacitance is large, the rise time of tr ≥tw is equal to or greater than the pulse width, and the signal is distorted to no height. Level flat tops or stay away from flat tops. As shown in the figure below (solid line):
For example, “simulation or oscilloscope measurement” can be verified.
Determining factors: line width, line length, substrate dielectric thickness, dielectric constant, load number, operating frequency (pulse width), tr digital signal changes. After discussing the above seven items, it can be seen that its distortion cannot be ignored. If left unchecked and not strictly restricted, the resulting system cannot work stably and reliably.
The Links: PM15CKF120 7MBR100U4B120-50