Today’s data acquisition systems are not only core components of industrial applications, but are often used to implement sensor-based measurements of temperature, flow, level, pressure, and other physical quantities, which are then converted into high-resolution digital information for transmission to software For further processing, these systems require increasingly higher precision.
To do this, developers must consider characteristics that can adversely affect the system, such as signal noise and drift, as well as requirements such as increased slew rate and transfer rate. Direct connection of different sensor types and correspondingly different analog signal outputs usually requires high input impedance. In addition, the input should be able to buffer, amplify, and level the input signal, or be able to generate a differential signal that covers the entire voltage range of the analog-to-digital converter (ADC) while meeting its common-mode voltage requirements.
However, the original measurement signal should be kept as undistorted as possible. Therefore, the input stage is one of the decisive factors in determining the overall accuracy of the data acquisition system. This is typically achieved with a programmable gain instrumentation amplifier (PGIA), where the gain is adjusted through an external resistor and the output is coupled directly to the input of the downstream ADC. PGIAs are usually equipped with single-ended outputs and therefore cannot be used directly to drive fully differential successive approximation register (SAR) ADCs. Therefore, additional signal conditioning or driver stages are required. However, the extra driver stage can affect the performance of the overall data acquisition system because it can introduce some components that can introduce additional errors. Excellent performance can be ensured by choosing the right components, as shown in Figure 1.
Figure 1. Simplified block diagram of a precision data acquisition system.
Figure 1 shows a simplified circuit for a data acquisition system that includes a reference and reference buffer with integrated power supply, as well as a PGIA and AD4020SAR ADC. The differential outputs of the PGIA employ discrete standard components that enable digitally programmable gain. Its input impedance is in the GΩ range, its common-mode rejection ratio exceeds 92 dB, and its low output noise and distortion make it ideal for direct control of SAR ADCs without compromising performance. The PGIA drives the AD4020, a high precision 20-bit 1.8 MSPS low power SARADC. The AD4020 offers a range of other features that can be used to reduce overall signal chain complexity and increase channel density without compromising performance. Other features include a high impedance mode for reducing nonlinear input currents, and a long sense phase for a simple RC filter connecting the PGIA directly in between. The AD4020 offers a high sampling rate for accurate acquisition of high frequency signals up to hundreds of kilohertz. It also supports decimation, which expands the dynamic range for precise detection of low-voltage signals. In addition, the need for anti-aliasing filters can be reduced.
The SPI interface is compatible with different logic levels (1.8 V, 2.5 V, 3 V, and 5 V), can be programmed in multiple ways, and provides read and write capabilities.
The circuit in Figure 1 uses the components shown to achieve excellent linearity (INL, ±2 ppm typical), low offset and gain drift (±3.5 ppm/°C and ±6 ppm/°C, respectively) , and excellent noise power (over C115 dB), all of which support the highest slew rate and full gain range. This circuit supports bipolar and unipolar single-ended or fully differential input signals (up to ±10 V) with a gain of 1 to 10. The input voltage range is a function of gain, see Table 1.
Table 1. Input Voltage Range as a Function of Gain
The circuit shown also offers calibration options for larger PGIA ranges. This feature provides precise ratiometric performance and simplifies system design by providing options for signal buffering, amplification and attenuation, common-mode level shift, and a variety of other features that address the challenges of analog signal processing. A wide variety of sensors offering unipolar, bipolar, differential, and single-ended outputs can be connected through a high-impedance input and programmable gain design. In addition, drift, offset, linearity, SNR, and common-mode rejection requirements can also be met. In this way, a high-precision data acquisition system suitable for extremely high-precision demanding applications can be easily implemented.
• Small package: 10-pin MSOP
• Programmable gain: 1, 2, 5, 10
• Gain settings: digital or pin programmable
• Wide supply voltage range: ±5 V to ±15 V
• Excellent DC performance
High Common Mode Rejection Ratio (CMRR): 98 dB (min, G = 10)
Low Gain Drift: 10 ppm/°C (max)
Low offset drift: 1.7 µV/°C (max, G = 10)
• Excellent AC performance
0.001% Fast Settling Time: 615 ns (max)
High Slew Rate: 20 V/µs (min)
Low Distortion: −110 dB THD (1 kHz)
High Common Mode Rejection Ratio (CMRR) vs. Frequency:
80 dB (50 kHz, min)
Low Noise: 18 nV/√Hz (G = 10, max)
Low power consumption: 4 mA