Parallel Active Power Filter Controller Based on DSP ARM
“For the three-phase system, an APF control algorithm based on the DC-side capacitor voltage control LJ151 is adopted. From the perspective of instantaneous active and reactive power transmission in the system, the goal is to adjust the active power of the grid input APF, and directly control the input power. The current is controlled, eliminating the tedious process of detecting active and reactive current components, and making the process of detecting harmonics simple. And designed an all-digital parallel APF controller based on DSP and ARM.
Introduction: For the three-phase system, an APF control algorithm based on the DC-side capacitor voltage control nut lJl51 is adopted. From the perspective of instantaneous active and reactive power transmission in the system, the goal is to adjust the active power of the grid input APF, directly Controlling the input current saves the tedious process of detecting active and reactive current components and makes the process of detecting harmonics simple. And designed an all-digital parallel APF controller based on DSP and ARM.
In recent years, with the wide application of power Electronic equipment and nonlinear and impact equipment. The harmonics generated in the power grid cause serious pollution to the power grid system, so eliminating the harmonic pollution in the power grid has become an important topic in power quality research. At present, the commonly used parallel passive filter has poor filtering effect and is sensitive to power grid parameters. Components are bulky. In severe cases, it will lead to defects such as series-parallel resonance accidents. Active power filter (APF) technology using modern power electronics technology, digital signal processing (DSP) technology and advanced control theory (iv) to perform dynamic real-time compensation for power grid harmonics. It is the most effective and potential way to solve the harmonic pollution problem at present.
The traditional parallel APF control methods are mostly based on calculation and measurement methods such as instantaneous reactive power theory and adaptive theory. First, the harmonic components in the load current are calculated, and then the harmonic current value is calculated according to the calculated value. Control the compensation current and the DC side capacitor voltage respectively. This method requires more complex mathematical operations, which affects the response speed of the device. Current distortion is prone to occur when the load changes.
For the three-phase system, an APF control algorithm based on the DC-side capacitor voltage control LJ151 is adopted. From the perspective of instantaneous active and reactive power transmission in the system, the goal is to adjust the active power of the grid input APF, and directly control the input power. The current is controlled, eliminating the tedious process of detecting active and reactive current components, and making the process of detecting harmonics simple. And designed an all-digital parallel APF controller based on DSP and ARM.
2 Control strategy
2.1 DC side capacitor voltage control algorithm
Through the control algorithm, the power supply side injects appropriate energy into the capacitor to compensate for the loss caused by the disconnection of the power electronic device and maintain the stability of the DC side capacitor voltage H by. The integral of the power loss in the actual compensation device is not zero in one cycle, which will cause the change of the period value of u, which reflects the transmission of active power on both sides of the inverter.
The algorithm controls the active current input from the power supply on the AC side to compensate for the loss of the switching device. The integral of the AC side compensation power PA in one cycle is:
The energy change in one cycle, that is, the amount of electricity stored on the DC capacitor can be expressed as:
Simultaneous equation (1) and equation (2), the compensation goal is to make the two equations equal. Take one r as the unit. The magnitude of the equivalent compensation current on the AC side can be calculated. Figure 1 shows a block diagram of the single-cycle control of the DC link voltage designed accordingly. Periodic sampling is performed, and after the voltage comparison value obtained by sampling is corrected through the proportional integral link, the amplitude k of the loss current can be obtained. Make the loss current in the same phase as the system voltage to ensure that it is an equivalent active current: control the transfer of active power to ensure stability around a certain value.
It can be seen from Figure 1 that the adjustment of u output forms a negative feedback, which satisfies the requirement that output is always near a certain fixed value.
2.2 Harmonic compensation
For a certain stable harmonic source, the harmonics of the load can be compensated by superimposing the harmonic detection link in the control loop, either full compensation or compensation for specific harmonics can be selected. At the same time, a limiter link is added to the harmonic detection link. In order to offset the impact of load mutation, play the role of protection circuit. The extraction of harmonic current can be calculated according to the FFI’ method:
2.3 Overall Control Block Diagram
Figure 2 shows the overall control block diagram. Target current output includes control and harmonic current detection. Hysteresis comparison with the compensation current actually output by the compensator. Output three-phase PWM signal to control the converter.
3 Design of Active Power Filter Control System
The designed APF control system adopts DSP+ARM dual-core structure. DSP completes functions such as sampling control, A/D conversion, voltage regulation and command current calculation, and ARM implements peripheral expansion functions.
Adopt a 32-bit fixed-point digital signal processor TMS320F2808 newly introduced in recent years. It has rich on-chip peripheral settings:
The two event manager modules each contain two 16-bit timers. Complete PWM signal generation, signal indication and fault protection functions; 12-bit ADC with minimum conversion time of 160 ns completes data acquisition: CAN, SCI and SPI communication interfaces complete fast communication functions. Its maximum main frequency is 100 MHz. A single instruction cycle is 10 ns. It can well meet the control requirements of the APF control system.
Adopt LPC2364 ARM chip. It is based on an ARMTTDMI.STMCPU microcontroller that supports real-time emulation and embedded tracing, which is powerful and cost-effective. It supports 10/100 Ethernet, full-speed USB2.0 and CAN2.0B. It has up to 512 kB of FLASH and 58 kB of SRAM. It can easily realize the man-machine interface composed of LCD Display and keyboard. And the communication function with the host computer. The block diagram of the control system is shown in Figure 3.
The three-phase voltage signal, DC side voltage signal, load current signal and APF output signal in the power grid are sent to DSP for conversion after signal conditioning. DSP built-in A/D module has 12-bit resolution and pipeline structure. According to the sampled data, the compensation current calculated by TMS320F2808 is compared with the actual output compensation current of the APF for hysteresis. Output three-phase PWM signal to control the converter. At the same time, logic devices are used to form a hardware dead zone control mode, and corresponding logic hardware drive protection is designed with IGBT modules. to improve the reliability of the system.
CAN communication mode is adopted between DSP and ARM, and the communication speed can reach 1 Mb/s. It can well meet the requirements of high-speed data transmission.
The ARM calls the data through the CAN bus and expands the FLASH chip to store the data. The chip adopts 16 MB capacity FLASH in I/O mode. The board can be extended to 8 pieces. Use the output of the three-eight decoder as the strobe signal. Mainly used to store LCD Display data: ARM chip adopts standard SPI interface. Data exchange with the display panel: with standard 232/485 interface. It is used for the expansion of host computer communication and communication port functions. such as printers.
The system program consists of the main program and the timer overflow interrupt program.
The main program is responsible for DSP system initialization and variable initialization. Complete the sampling of the three-phase system. Execute the control algorithm in Figure 4a, including digital phase-locked loop, voltage PI regulation, and calculation of id; the interrupt routine shown in Figure 4b is responsible for three-phase hysteresis comparison control.
4 Simulation and experiment
In the case of asymmetric harmonic loads, the simulation is carried out using the power simulation software EMTP (the waveform is omitted). From the simulation results, the three-phase system current before compensation is asymmetrical, non-sinusoidal, and contains a lot of harmonics; after compensation, ih, ih, ik are symmetrical and in phase with the system voltage.
FIG. 5 shows the measured waveform after compensation using the APF of the set poem. Comparing the two figures, the harmonic content after compensation is significantly reduced, and the APF harmonic compensation effect is obvious.
A parallel active power filter based on DSP-ARM full digital control is designed for three-phase system. The DC side voltage control method based on the principle of energy conservation is adopted, which can achieve full compensation for harmonics. And the control strategy is still valid for the unbalanced three-phase system. The three-phase currents can be kept symmetrical by compensating for asymmetric harmonic sources. The simulation and actual test results show the correctness of the control strategy. It can make the system have good harmonic suppression characteristics and response speed.
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